Short Biography

In 2011, I obtained my bachelor's degree in Engineering and Information Technologies from FEEIT at Ss. Cyril and Methodius University, Macedonia. The same year, I received a fellowship from the doctoral school for Computer and Communication Sciences at EPFL, Switzerland where I started the doctoral studies. Until 2017, I worked as a researcher and a PhD candidate at the Processor Architecture Laboratory (LAP) under the supervision of Paolo Ienne. I mainly worked on research and development of new algorithms for logic synthesis, mostly based on SAT solving. In 2017, I obtained my PhD degree for the thesis entitled "Exploiting Satisfiability Solvers for Efficient Logic Synthesis".

Publications

PhD Thesis Conference Papers Book Chapters Workshop Papers

PhD Thesis

Exploiting Satisfiability Solvers for Efficient Logic Synthesis
Ana Petkovska
École Polytechnique Fédérale de Lausanne (EPFL)
Lausanne, Switzerland | 2017
PhD Thesis | | |

Conference Papers

Canonical Computation without Canonical Representation
Alan Mishchenko, Robert Brayton, Ana Petkovska, Mathias Soeken, Luca Amarù, and Antun Domic
In Proceedings of the 55th Design Automation Conference (DAC)
San Francisco, CA, USA | June 2018
Conference Paper 7 | | To appear.
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Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains
Zhufei Chu, Xifan Tang, Mathias Soeken, Ana Petkovska, Grace Zgheib, Luca Gaetano Amarù, Yinshui Xia, Paolo Ienne, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
In Great Lakes Symposium on VLSI (GLSVLSI)
Banff, AB, Canada | May 2017
Conference Paper 6 | | |
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Fast Generation of Lexicographic Satisfiable Assignments: Enabling Canonicity in SAT-based Applications
Ana Petkovska, Alan Mishchenko, Mathias Soeken, Giovanni De Micheli, Robert Brayton, and Paolo Ienne
In Proceedings of the International Conference on Computer Aided Design (ICCAD)
Austin, TX, USA | November 2016
Conference Paper 5 | | |
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Fast Hierarchical NPN Classification
Ana Petkovska, Mathias Soeken, Giovanni De Micheli, Paolo Ienne, and Alan Mishchenko
In Proceedings of the 26th International Conference on Field-Programmable Logic and Applications (FPL)
Lausanne, Switzerland | August 2016
Conference Paper 4 | | |
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Heuristic NPN Classification for Large Functions Using AIGs and LEXSAT
Mathias Soeken, Alan Mishchenko, Ana Petkovska, Baruch Sterin, Paolo Ienne, Robert Brayton, and Giovanni De Micheli
In Proceedings of the International Conference on Theory and Applications of Satisfiability Testing (SAT)
Bordeaux, France | July 2016
Conference Paper 3 | | | | Best Paper Award Nominee
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Improved Carry-Chain Mapping for the VTR Flow
Ana Petkovska, Grace Zgheib, David Novo, Muhsen Owaida, Alan Mishchenko, and Paolo Ienne
In Proceedings of the 2015 International Conference on Field Programmable Technology (FPT)
Queenstown, New Zealand | December 2015
Conference Paper 2 | | |
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Constrained Interpolation for Guided Logic Synthesis
Ana Petkovska, David Novo, Alan Mishchenko, and Paolo Ienne
In Proceedings of the International Conference on Computer Aided Design (ICCAD)
San Jose, CA, USA | November 2014
Conference Paper 1 | | | | Best Paper Award Nominee

Book Chapters

Progressive Generation of Canonical Irredundant Sums of Products Using a SAT Solver
Ana Petkovska, Alan Mishchenko, David Novo, Muhsen Owaida, and Paolo Ienne
In Advanced Logic Synthesis (Editors R. Drechsler and A. Reis), Springer
Cham, Switzerland | 2018
Book Chapter 1 | | |

Workshop Papers

SAT-Based Optimization with Don't-Cares Revisited
Alan Mishchenko, Robert K. Brayton, Ana Petkovska, and Mathias Soeken
Proceedings of the 26th International Workshop on Logic and Synthesis (IWLS)
Austin, TX, USA | June 2017
Workshop Paper 7 | |
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ELVE: An Interactive and Extensible Visualisation Tool for Logic Circuits
Gregoire Hirt, Ana Petkovska, and Paolo Ienne
Proceedings of the 4th Workshop on Design Automation for Understanding Hardware Designs (DUHDe)
Lausanne, Switzerland | March 2017
Workshop Paper 6 | |
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Fast Generation of Lexicographic Satisfiable Assignments: Enabling Canonicity in SAT-based Applications
Ana Petkovska, Alan Mishchenko, Mathias Soeken, Giovanni De Micheli, Robert Brayton, and Paolo Ienne
In Proceedings of the 25th International Workshop on Logic and Synthesis (IWLS)
Austin, TX, USA | June 2016
Workshop Paper 5 | See ICCAD'16 | Best Student Paper Award Nominee
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Progressive Generation of Canonical Sums of Products Using a SAT Solver
Ana Petkovska, Alan Mishchenko, David Novo, Muhsen Owaida, and Paolo Ienne
In Proceedings of the 25th International Workshop on Logic and Synthesis (IWLS)
Austin, TX, USA | June 2016
Workshop Paper 4 | See Book Chapter 1
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Majority-Inverter Graph for FPGA Synthesis
Luca Amarù, Ana Petkovska, Pierre-Emmanuel Gaillardon, David Novo Bruna, Paolo Ienne, Giovanni De Micheli
In Proceedings of the 19th Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI)
Jiaosi, Taiwan | March 2015
Workshop Paper 3 | |
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Constrained Interpolation for Guided Logic Synthesis
Ana Petkovska, David Novo, Alan Mishchenko, and Paolo Ienne
In Proceedings of the 23rd International Workshop on Logic and Synthesis (IWLS)
San Francisco, CA, USA | May 2014
Workshop Paper 2 | See ICCAD'14
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Enhancing Iterative Layering with SAT Solvers
Ana Petkovska, David Novo, Ajay K. Verma, Alan Mishchenko, and Paolo Ienne
In Proceedings of the 22nd International Workshop on Logic and Synthesis (IWLS)
Austin, TX, USA | June 2013
Workshop Paper 1 | |

Copyright statement

The publications on this website are made available to ensure timely dissemination of research results. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright unless otherwise stated, for example by a Creative Commons Licence. In most cases, these publications may not be reposted without the explicit permission of the copyright holder.

Teaching

Courses Student Projects

Courses

Programming I (MA, PH) with Prof. Jean-Cédric Chappelier.
EPFL, Switzerland | Fall, 2016
teaching assistant
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Systems-on-Chip Architecture with Prof. Paolo Ienne.
EPFL, Switzerland | Spring, 2016
teaching assistant
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Computer architecture with Prof. Paolo Ienne.
EPFL, Switzerland | Fall, 2015
teaching assistant
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Systems-on-Chip Architecture with Prof. Paolo Ienne.
EPFL, Switzerland | Spring, 2015
teaching assistant
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Computer architecture II with Prof. Paolo Ienne.
EPFL, Switzerland | Spring, 2014
teaching assistant
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Computer architecture I with Prof. Paolo Ienne.
EPFL, Switzerland | Fall, 2013
teaching assistant
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Computer architecture II with Prof. Paolo Ienne.
EPFL, Switzerland | Spring, 2013
teaching assistant
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Algorithms with Prof. Ola Svensson.
EPFL, Switzerland | Fall, 2012
teaching assistant
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Logic Circuits and Discrete Automata with Prof. Aristotel Tentov.
FEEIT, Macedonia | Fall, 2010
student assistant

Student Projects

Semester and internship student projects supervised together with Prof. Paolo Ienne.

Improving the Runtime of Exact NPN Classification using Shannon Cofactors
EPFL, Switzerland | Fall 2016
semester project
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Interactive Visualisation Tool for Logic Circuits
EPFL, Switzerland | Fall 2016
semester project
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Incremental Addition and Removal of Assumptions for Faster SAT-based SOP Generation
EPFL, Switzerland | Summer 2016
internship project
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Speeding Up Exact NPN-Classification using Symmetries
EPFL, Switzerland | Summer 2016
internship project
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Scalable Divisor Extraction Algorithm using Decomposition
EPFL, Switzerland | Spring 2015
semester project
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Cube Generation for a SAT-Based Divisor Extraction Algorithm
EPFL, Switzerland | Summer 2015
internship project
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Enhancing the Iterative Layering Algorithm using Incremental SAT Solving
EPFL, Switzerland | Summer 2013
internship project
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Evaluation Methods for Iterative Layering
EPFL, Switzerland | Summer 2013
internship project